Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34658 )
Change subject: soc/intel/common/block/acpi: [WIP]Add provision to inject PCI PIRQ ACPI mapping ......................................................................
soc/intel/common/block/acpi: [WIP]Add provision to inject PCI PIRQ ACPI mapping
This implementation adds provision to inject PCI IRQ ACPI mapping into DSDT acpi table.
Change-Id: I60ae7cbcfe53c4cb21e88997b06ec8af4b59b844 Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/common/block/acpi/acpi.c 1 file changed, 40 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/34658/1
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 3a34c79..b7b5d57 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -25,6 +25,7 @@ #include <cpu/x86/msr.h> #include <cpu/x86/smm.h> #include <intelblocks/acpi.h> +#include <intelblocks/irq.h> #include <intelblocks/msr.h> #include <intelblocks/pmclib.h> #include <intelblocks/uart.h> @@ -228,7 +229,37 @@ { }
-void southbridge_inject_dsdt(struct device *device) +#if CONFIG(SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE) + +static void generate_pci_pirq_entries(void) +{ + uint8_t num_entries; + struct dev_irq *irqlist; + + irqlist = (struct dev_irq *)soc_get_irq_config(&num_entries); + if (!num_entries) + return; + acpigen_write_scope("\_SB.PCI0"); + acpigen_write_name("PICP"); + acpigen_write_package(num_entries); + + for (int i = 0; i < num_entries; i++) { + acpigen_write_package(4); + acpigen_write_dword((irqlist->slot << 16) | 0xffff); + acpigen_write_byte(irqlist->int_pin - 1); + acpigen_write_zero(); + acpigen_write_byte(irqlist->int_line); + acpigen_pop_len(); + irqlist++; + } + + acpigen_pop_len(); + acpigen_pop_len(); + +} +#endif + +static void generate_gnvs_entry(void) { struct global_nvs_t *gnvs;
@@ -249,6 +280,14 @@ acpigen_write_name_dword("NVSA", (uintptr_t) gnvs); acpigen_pop_len(); } + +} +void southbridge_inject_dsdt(struct device *device) +{ + generate_gnvs_entry(); +#if CONFIG(SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE) + generate_pci_pirq_entries(); +#endif }
static int calculate_power(int tdp, int p1_ratio, int ratio)