Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46126 )
Change subject: mb/google/puff/var/dooly: Update devicetree for project change ......................................................................
mb/google/puff/var/dooly: Update devicetree for project change
1. Update USB configuration USBA*2 USBC*2
2. Remove unused device no SD card reader no built-in LAN
3. Add audio configuration ALC1015 speaker amplifier
4. Enable dmic+ssp registers DMIC for camera module
BUG=b:170273526 BRANCH=puff TEST=Build and check DUT function status
Change-Id: Icb66a8d5382ca9664e7f0b3660f446aeb3cf1dd3 Signed-off-by: Tony Huang tony-huang@quanta.corp-partner.google.com --- M src/mainboard/google/hatch/variants/dooly/overridetree.cb 1 file changed, 60 insertions(+), 129 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/46126/1
diff --git a/src/mainboard/google/hatch/variants/dooly/overridetree.cb b/src/mainboard/google/hatch/variants/dooly/overridetree.cb index 8a603f7..2260ba6 100644 --- a/src/mainboard/google/hatch/variants/dooly/overridetree.cb +++ b/src/mainboard/google/hatch/variants/dooly/overridetree.cb @@ -21,13 +21,14 @@ # USB configuration register "usb2_ports[0]" = "{ .enable = 1, - .ocpin = OC2, + .ocpin = OC0, .tx_bias = USB2_BIAS_0MV, .tx_emp_enable = USB2_PRE_EMP_ON, .pre_emp_bias = USB2_BIAS_11P25MV, .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, - }" # Type-A Port 2 - register "usb2_ports[1]" = "{ + }" # Type-A Port 0 + register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port 0 + register "usb2_ports[2]" = "{ .enable = 1, .ocpin = OC1, .tx_bias = USB2_BIAS_0MV, @@ -35,61 +36,26 @@ .pre_emp_bias = USB2_BIAS_28P15MV, .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, }" # Type-A Port 1 - register "usb2_ports[2]" = "{ - .enable = 1, - .ocpin = OC3, - .tx_bias = USB2_BIAS_0MV, - .tx_emp_enable = USB2_PRE_EMP_ON, - .pre_emp_bias = USB2_BIAS_28P15MV, - .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, - }" # Type-A Port 3 - register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port - register "usb2_ports[4]" = "{ - .enable = 1, - .ocpin = OC_SKIP, - .tx_bias = USB2_BIAS_0MV, - .tx_emp_enable = USB2_PRE_EMP_ON, - .pre_emp_bias = USB2_BIAS_28P15MV, - .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, - }" # Type-A Port 4 - register "usb2_ports[5]" = "{ - .enable = 1, - .ocpin = OC0, - .tx_bias = USB2_BIAS_0MV, - .tx_emp_enable = USB2_PRE_EMP_ON, - .pre_emp_bias = USB2_BIAS_28P15MV, - .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, - }" # Type-A port 0 + register "usb2_ports[3]" = "USB2_PORT_EMPTY" + register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port 1 + register "usb2_ports[5]" = "USB2_PORT_LONG(OC_SKIP)" # USB cam register "usb2_ports[6]" = "USB2_PORT_EMPTY" register "usb2_ports[7]" = "USB2_PORT_EMPTY" register "usb2_ports[8]" = "USB2_PORT_EMPTY" - register "usb2_ports[9]" = "{ - .enable = 1, - .ocpin = OC_SKIP, - .tx_bias = USB2_BIAS_0MV, - .tx_emp_enable = USB2_PRE_EMP_ON, - .pre_emp_bias = USB2_BIAS_28P15MV, - .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, - }" # BT + register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # BT
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port 2 - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port 3 - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC1)" # Type-A Port 1 - register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C - register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 0 - register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port 4 + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 0 + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-A Port 1 + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port 1 + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port 0 + register "usb3_ports[4]" = "USB3_PORT_EMPTY" + register "usb3_ports[5]" = "USB3_PORT_EMPTY"
# Bitmap for Wake Enable on USB attach/detach register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ - USB_PORT_WAKE_ENABLE(2) | \ - USB_PORT_WAKE_ENABLE(3) | \ - USB_PORT_WAKE_ENABLE(5) | \ - USB_PORT_WAKE_ENABLE(6)" + USB_PORT_WAKE_ENABLE(3)" register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ - USB_PORT_WAKE_ENABLE(2) | \ - USB_PORT_WAKE_ENABLE(3) | \ - USB_PORT_WAKE_ENABLE(5) | \ - USB_PORT_WAKE_ENABLE(6)" + USB_PORT_WAKE_ENABLE(2)"
# Enable eMMC HS400 register "ScsEmmcHs400Enabled" = "1" @@ -139,10 +105,6 @@ # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39. register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515"
- # Intel HDA - disable I2S Audio SSP1 and DMIC0 as puff variant does not have them. - register "PchHdaAudioLinkSsp1" = "0" - register "PchHdaAudioLinkDmic0" = "0" - # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | @@ -151,9 +113,9 @@ #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| I2C0 | RFU | - #| I2C2 | PS175 | - #| I2C3 | MST | + #| I2C0 | ALC 1015 | + #| I2C2 | Lvds | + #| I2C3 | Touchscreen | #| I2C4 | Audio | #+-------------------+---------------------------+ register "common_soc_config" = "{ @@ -183,9 +145,6 @@ }, }"
- # PCIe port 7 for LAN - register "PcieRpEnable[6]" = "1" - register "PcieRpLtrEnable[6]" = "1" # PCIe port 11 (x2) for NVMe hybrid storage devices register "PcieRpEnable[10]" = "1" register "PcieRpLtrEnable[10]" = "1" @@ -193,9 +152,6 @@ register "PcieClkSrcUsage[0]" = "6" register "PcieClkSrcClkReq[0]" = "0"
- # GPIO for SD card detect - register "sdcard_cd_gpio" = "vSD3_CD_B" - # SATA port 1 Gen3 Strength # Port1 Tx De-Emphasis = 20*log(0x20/64) = -6dB register "sata_port[1].TxGen3DeEmphEnable" = "1" @@ -271,103 +227,91 @@ chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi - register "desc" = ""USB2 Type-A Front Left"" + register "desc" = ""USB2 Type-A Port 0"" register "type" = "UPC_TYPE_A" - register "group" = "ACPI_PLD_GROUP(0, 0)" + register "group" = "ACPI_PLD_GROUP(1, 1)" device usb 2.0 on end end chip drivers/usb/acpi - register "desc" = ""USB2 Type-C Port Rear"" + register "desc" = ""USB2 Type-C Port 0"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(1, 3)" + register "group" = "ACPI_PLD_GROUP(2, 1)" device usb 2.1 on end end chip drivers/usb/acpi - register "desc" = ""USB2 Type-A Front Right"" + register "desc" = ""USB2 Type-A Port 1"" register "type" = "UPC_TYPE_A" - register "group" = "ACPI_PLD_GROUP(0, 1)" + register "group" = "ACPI_PLD_GROUP(1, 2)" device usb 2.2 on end end chip drivers/usb/acpi - register "desc" = ""USB2 Type-A Rear Right"" - register "type" = "UPC_TYPE_A" - register "group" = "ACPI_PLD_GROUP(1, 2)" - device usb 2.3 on end - end + device usb 2.3 off end + end chip drivers/usb/acpi - register "desc" = ""USB2 Type-A Rear Middle"" - register "type" = "UPC_TYPE_A" - register "group" = "ACPI_PLD_GROUP(1, 1)" + register "desc" = ""USB2 Type-C Port 1"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(2, 2)" device usb 2.4 on end end chip drivers/usb/acpi - register "desc" = ""USB2 Type-A Rear Left"" - register "type" = "UPC_TYPE_A" - register "group" = "ACPI_PLD_GROUP(1, 0)" + register "desc" = ""Camera"" + register "type" = "UPC_TYPE_INTERNAL" device usb 2.5 on end end chip drivers/usb/acpi device usb 2.6 off end end chip drivers/usb/acpi - register "desc" = ""USB3 Type-A Front Left"" + register "desc" = ""USB3 Type-A Port 0"" register "type" = "UPC_TYPE_USB3_A" - register "group" = "ACPI_PLD_GROUP(0, 0)" + register "group" = "ACPI_PLD_GROUP(1, 1)" device usb 3.0 on end end chip drivers/usb/acpi - register "desc" = ""USB3 Type-A Front Right"" + register "desc" = ""USB3 Type-A Port 1"" register "type" = "UPC_TYPE_USB3_A" - register "group" = "ACPI_PLD_GROUP(0, 1)" + register "group" = "ACPI_PLD_GROUP(1, 2)" device usb 3.1 on end end chip drivers/usb/acpi - register "desc" = ""USB3 Type-A Rear Right"" - register "type" = "UPC_TYPE_USB3_A" - register "group" = "ACPI_PLD_GROUP(1, 2)" + register "desc" = ""USB3 Type-C Port 1"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(2, 2)" device usb 3.2 on end end chip drivers/usb/acpi - register "desc" = ""USB3 Type-C Rear"" + register "desc" = ""USB3 Type-C Port 0"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(1, 3)" + register "group" = "ACPI_PLD_GROUP(2, 1)" device usb 3.3 on end end chip drivers/usb/acpi - register "desc" = ""USB3 Type-A Rear Left"" - register "type" = "UPC_TYPE_USB3_A" - register "group" = "ACPI_PLD_GROUP(1, 0)" - device usb 3.4 on end + device usb 3.4 off end end chip drivers/usb/acpi - register "desc" = ""USB3 Type-A Rear Middle"" - register "type" = "UPC_TYPE_USB3_A" - register "group" = "ACPI_PLD_GROUP(1, 1)" - device usb 3.5 on end + device usb 3.5 off end end end end end # USB xHCI - device pci 15.0 off - # RFU - Reserved for Future Use. - end # I2C #0 + device pci 14.5 off end # SDCard + device pci 15.0 on + chip drivers/i2c/generic + register "hid" = ""10EC1015"" + register "desc" = ""Realtek SPK AMP L"" + register "uid" = "0" + device i2c 28 on end + end + chip drivers/i2c/generic + register "hid" = ""10EC1015"" + register "desc" = ""Realtek SPK AMP R"" + register "uid" = "1" + device i2c 29 on end + end + end # I2C #0 ALC1015 device pci 15.1 off end # I2C #1 - device pci 15.2 on - chip drivers/i2c/generic - register "hid" = ""1AF80175"" - register "name" = ""PS17"" - register "desc" = ""Parade PS175"" - device i2c 4a on end - end - end # I2C #2, PCON PS175. - device pci 15.3 on - chip drivers/i2c/generic - register "hid" = ""10EC2142"" - register "name" = ""RTD2"" - register "desc" = ""Realtek RTD2142"" - device i2c 4a on end - end - end # I2C #3, Realtek RTD2142. + device pci 15.2 on end # I2C #2 LVDS + device pci 15.3 on end # I2C #3 Touchscrren device pci 16.0 on end # Management Engine Interface 1 device pci 19.0 on chip drivers/i2c/generic @@ -384,19 +328,6 @@ end end #I2C #4 device pci 1a.0 on end # eMMC - device pci 1c.6 on - chip drivers/net - register "customized_leds" = "0x05af" - register "wake" = "GPE0_DW1_07" # GPP_C7 - register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A18)" - register "stop_delay_ms" = "12" # NIC needs time to quiesce - register "stop_off_delay_ms" = "1" - register "has_power_resource" = "1" - register "device_index" = "0" - device pci 00.0 on end - end - register "PcieRpSlotImplemented[6]" = "1" - end # RTL8111H Ethernet NIC device pci 1d.2 on # PCI Express Port 11 (X2 NVMe) register "PcieRpSlotImplemented[10]" = "1" end