[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8183: Set correct threshold of EMI bandwidth for DVFS ...

[huayang duan (Code Review)]

Hello Yu-Ping Wu, Duan huayang, Julius Werner, Derek Waldner, Hung-Te Lin, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/39034

to look at the new patch set (#4).

Change subject: soc/mediatek/mt8183: Set correct threshold of EMI bandwidth for DVFS switch
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soc/mediatek/mt8183: Set correct threshold of EMI bandwidth for DVFS switch

The threshold level of EMI bandwidth should have different setting
between discrete and EMCP DDR in DVFS switch policy. If the emi total
bandwidth reach to threshold level, system will notify DVFS module
do DVFS switch for system preformance or lower power require.

The discrete DDR and EMCP DDR have different DVFS tables,
for EMCP DDR, the DRAM frequency are 1600Mbps, 3200Mbps, 3600Mbps,
for discrtet DDR, the DRAM frequecy are 1600Mbps, 2400Mbps, 3200Mbps.
So the threshold level of discrete and EMCP DDR must have diff setting.

BRANCH=kukui
BUG=none
TEST=bootup pass

Change-Id: I82c3c70bcd90df3fdd613c0353aba0f176bc82bc
Signed-off-by: Huayang Duan 
---
M src/soc/mediatek/mt8183/emi.c
1 file changed, 4 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/39034/4