[coreboot-gerrit] Change in coreboot[master]: Revert "soc/intel/common/{pch,sata}: Remove SATA common code driver"

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43077 )

Change subject: Revert "soc/intel/common/{pch,sata}: Remove SATA common code driver"
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Patch Set 4:
> Patch Set 4:
> > Patch Set 4:
> > > Patch Set 3:
> > > > Patch Set 1:
> > > >
> > > > can you please check if FSP is programming those SATA offline registers ?
> > >
> > > Ummm.. not sure how to do that...
> >
> > May i know with whom u r working from Intel so i can ask for help?
>
> Indirectly through [e-mail], who auggested I initiate the revert.

Subrata - Andrew might need some help to poke things. If you have suggestions on what to try, he can help you run the experiments and provide the logs.

I think in general we need to evaluate what programming is required for SATA initialization. I understand that FSP is supposed to be setting up the registers, but something is still not correct. This issue from 3 years ago is probably back which was solved using: https://review.coreboot.org/c/coreboot/+/21890/. I think FSP is still not setting Bus Master for AHCI. Duncan had a comment in there about coreboot setting up the bus master instead of relying on FSP to do that and I agree that we should do it in coreboot. We probably don't need a complete revert of this CL, but simply enabling of bus master.