HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33685
Change subject: src/northbridge: Use 'include <stdlib.h>' when appropriate ......................................................................
src/northbridge: Use 'include <stdlib.h>' when appropriate
Change-Id: I7a214196b05d3af06c8cd742a6154b0627a0d82f Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/amd/amdht/h3finit.c M src/northbridge/amd/amdmct/mct_ddr3/s3utils.c M src/northbridge/amd/amdmct/wrappers/mcti_d.c M src/northbridge/intel/haswell/early_init.c M src/northbridge/intel/haswell/finalize.c M src/northbridge/intel/haswell/northbridge.c M src/northbridge/intel/i440bx/northbridge.c M src/northbridge/intel/i440bx/raminit.c M src/northbridge/intel/i945/northbridge.c M src/northbridge/intel/nehalem/finalize.c M src/northbridge/intel/sandybridge/northbridge.c M src/northbridge/intel/sandybridge/raminit_common.c 12 files changed, 14 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/33685/1
diff --git a/src/northbridge/amd/amdht/h3finit.c b/src/northbridge/amd/amdht/h3finit.c index cda0a28..1928b47 100644 --- a/src/northbridge/amd/amdht/h3finit.c +++ b/src/northbridge/amd/amdht/h3finit.c @@ -36,6 +36,7 @@ #include <device/pci_def.h> #include <northbridge/amd/amdfam10/raminit.h> #include <northbridge/amd/amdfam10/amdfam10.h> +#include <stdlib.h> #include <types.h>
/*---------------------------------------------------------------------------- diff --git a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c index d991002..d571816 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c @@ -30,11 +30,11 @@ #include <spi_flash.h> #include <pc80/mc146818rtc.h> #include <inttypes.h> +#include <stdlib.h> #include <types.h>
#include "mct_d.h" #include "mct_d_gcc.h" - #include "s3utils.h"
#define S3NV_FILE_NAME "s3nv" diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c index b8042fe..5833a82 100644 --- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c +++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c @@ -20,6 +20,7 @@ #include <cpu/amd/msr.h> #include <console/console.h> #include <types.h> +#include <stdlib.h>
#include "mcti.h"
diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c index 6fef0da..8f2921a 100644 --- a/src/northbridge/intel/haswell/early_init.c +++ b/src/northbridge/intel/haswell/early_init.c @@ -15,12 +15,12 @@ */
#include <stdint.h> -#include <stdlib.h> #include <console/console.h> #include <device/mmio.h> #include <device/pci_def.h> #include <device/pci_ops.h> #include <elog.h> + #include "haswell.h"
static bool peg_hidden[3]; diff --git a/src/northbridge/intel/haswell/finalize.c b/src/northbridge/intel/haswell/finalize.c index 1777006..7a82e99 100644 --- a/src/northbridge/intel/haswell/finalize.c +++ b/src/northbridge/intel/haswell/finalize.c @@ -14,8 +14,8 @@ * GNU General Public License for more details. */
-#include <stdlib.h> #include <device/pci_ops.h> + #include "haswell.h"
#define PCI_DEV_HSW PCI_DEV(0, 0, 0) diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index 2fd5959..23d86c4 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -25,9 +25,9 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include <stdlib.h> #include <cpu/x86/smm.h> #include <boot/tables.h> +#include <stddef.h>
#include "chip.h" #include "haswell.h" diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c index ef6329c..2c1ae72 100644 --- a/src/northbridge/intel/i440bx/northbridge.c +++ b/src/northbridge/intel/i440bx/northbridge.c @@ -17,8 +17,8 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <stdlib.h> #include <cpu/cpu.h> + #include "northbridge.h" #include "i440bx.h"
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c index 91959c7..9998280 100644 --- a/src/northbridge/intel/i440bx/raminit.c +++ b/src/northbridge/intel/i440bx/raminit.c @@ -18,11 +18,11 @@ #include <spd.h> #include <delay.h> #include <stdint.h> -#include <stdlib.h> #include <device/mmio.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <console/console.h> + #include "i440bx.h" #include "raminit.h"
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index e9867d9..8a188c9 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -20,10 +20,10 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <stdlib.h> #include <cpu/cpu.h> #include <arch/acpi.h> #include <cpu/intel/smm/gen1/smi.h> + #include "i945.h"
static int get_pcie_bar(u32 *base) diff --git a/src/northbridge/intel/nehalem/finalize.c b/src/northbridge/intel/nehalem/finalize.c index 97f6011..f0bb50b 100644 --- a/src/northbridge/intel/nehalem/finalize.c +++ b/src/northbridge/intel/nehalem/finalize.c @@ -14,8 +14,8 @@ * GNU General Public License for more details. */
-#include <stdlib.h> #include <device/pci_ops.h> + #include "nehalem.h"
#define PCI_DEV_SNB PCI_DEV(0, 0, 0) diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 5aa06c8..a4f2dd3 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -24,11 +24,11 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <stdlib.h> #include <cpu/cpu.h> +#include <cpu/intel/smm/gen1/smi.h> + #include "chip.h" #include "sandybridge.h" -#include <cpu/intel/smm/gen1/smi.h>
static int bridge_revision_id = -1;
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 4974173..3af9a62 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -23,6 +23,8 @@ #include <northbridge/intel/sandybridge/chip.h> #include <device/pci_def.h> #include <delay.h> +#include <stddef.h> +#include <stdlib.h>
#include "raminit_native.h" #include "raminit_common.h"