[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Call pci_dev_enable_bus_master() from .final ops

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44512 )

Change subject: soc/intel/common: Call pci_dev_enable_bus_master() from .final ops
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/44512/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/44512/2//COMMIT_MSG@15 
PS2, Line 15: access
Not sure what you mean here. To access PCI device resources PCI_COMMAND_IO and PCI_COMMAND_MEMORY should be sufficient. Which device needs PCI_COMMAND_MASTER and why can't the payload or OS set PCI_COMMAND_MASTER?