Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48207 )
Change subject: [WIP]soc/intel/apl: Cache CBMEM and compress postcar ......................................................................
[WIP]soc/intel/apl: Cache CBMEM and compress postcar
Copying WP to WB seems to slow things down but OTOH reducing the size speeds things up. There seems to be no speedup, only a size reduction.
Change-Id: I0f0b3f54a489a584c3e28fcc1650e6e1bbae2801 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/x86/mtrr/cbmem_cache.c M src/soc/intel/apollolake/Kconfig 2 files changed, 3 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/48207/1
diff --git a/src/cpu/x86/mtrr/cbmem_cache.c b/src/cpu/x86/mtrr/cbmem_cache.c index de5ed8b..8e63315 100644 --- a/src/cpu/x86/mtrr/cbmem_cache.c +++ b/src/cpu/x86/mtrr/cbmem_cache.c @@ -21,7 +21,7 @@
while (1) { /* Do some sanity check before it gets absurdly big. */ - if (mtrr_size > 64 * MiB) { + if (mtrr_size > 256 * MiB) { printk(BIOS_WARNING, "Not caching cbmem, too large region requested!\n"); return -1; } diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 4f762a9..0fdd708 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -109,6 +109,8 @@ select INTEL_GMA_ACPI select INTEL_GMA_SWSMISCI select HAVE_ASAN_IN_ROMSTAGE + select X86_CLFLUSH_CAR + select ROMSTAGE_CBMEM_CACHED
config MAX_CPUS int