[coreboot-gerrit] Change in coreboot[master]: nb/amd/amdfam10/bootblock.c: Remove goto's

[Michał Żygowski (Code Review)]

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62099 )

Change subject: nb/amd/amdfam10/bootblock.c: Remove goto's
......................................................................

nb/amd/amdfam10/bootblock.c: Remove goto's

Signed-off-by: Michał Żygowski 
Change-Id: I7f627ea4004d22592b8ec17932c5e2fd032751b2
---
M src/northbridge/amd/amdfam10/bootblock.c
1 file changed, 45 insertions(+), 32 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/62099/1

diff --git a/src/northbridge/amd/amdfam10/bootblock.c b/src/northbridge/amd/amdfam10/bootblock.c
index c8b5f99..0fe2464 100644
--- a/src/northbridge/amd/amdfam10/bootblock.c
+++ b/src/northbridge/amd/amdfam10/bootblock.c
@@ -43,6 +43,21 @@
    /* CPU on bus 0xff and 0xfe now. For now on we can use CONFIG_CBB and CONFIG_CDB. */
 }

+static void ht_chain_finalize(int ht_dev_num, u8 unitid, u8 pos, u8 end_used)
+{
+	if (CONFIG_HT_CHAIN_END_UNITID_BASE == 0x20)
+		return;
+
+	if ((ht_dev_num > 1) && (unitid != CONFIG_HT_CHAIN_END_UNITID_BASE) &&
+	    (end_used == 0)) {
+		u16 flags;
+		flags = pci_read_config16(PCI_DEV(0, unitid, 0), pos + PCI_CAP_FLAGS);
+		flags &= ~HT_PRIMARY_BASE_UNIT_ID_MASK;
+		flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & HT_PRIMARY_BASE_UNIT_ID_MASK;
+		pci_write_config16(PCI_DEV(0, unitid, 0), pos + PCI_CAP_FLAGS, flags);
+	}
+}
+
 static bool pci_cap_is_ht_primary(u8 pos)
 {
    u16 flags = pci_read_config16(PCI_DEV(0,0,0), pos + PCI_CAP_FLAGS);
@@ -86,8 +101,11 @@

id = pci_read_config32(PCI_DEV(0,0,0), PCI_VENDOR_ID);
    	/* If the chain is enumerated quit */
-		if (id == 0 || id == ULONG_MAX)
-			break;
+		if (id == 0 || id == ULONG_MAX) {
+			ht_chain_finalize(ht_dev_num, real_last_unitid, real_last_pos,
+					  end_used);
+			return;
+		}

pos = pci_s_find_capability(PCI_DEV(0,0,0), PCI_CAP_ID_HT);

@@ -106,27 +124,31 @@
    			pci_devfn_t devx;

if (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20) {
-					if (next_unitid >= 0x18) {
-						if (!end_used) {
-							next_unitid = CONFIG_HT_CHAIN_END_UNITID_BASE;
-							end_used = 1;
-						} else {
-							goto out;
-						}
+					if (next_unitid >= 0x18 && !end_used) {
+						next_unitid = CONFIG_HT_CHAIN_END_UNITID_BASE;
+						end_used = 1;
+					} else if (next_unitid >= 0x18 && end_used) {
+						ht_chain_finalize(ht_dev_num,
+									real_last_unitid,
+									real_last_pos,
+									end_used);
+						return;
    				}
    				real_last_unitid = next_unitid;
    				real_last_pos = pos;
    				ht_dev_num++;
    			}

-				if (CONFIG_HT_CHAIN_END_UNITID_BASE == 0) {
-					if (!next_unitid)
-						goto out;
+				if (CONFIG_HT_CHAIN_END_UNITID_BASE == 0 && !next_unitid) {
+					ht_chain_finalize(ht_dev_num, real_last_unitid,
+								real_last_pos, end_used);
+					return;
    			}

flags &= ~HT_PRIMARY_BASE_UNIT_ID_MASK;
-				flags |= next_unitid & HT_PRIMARY_BASE_UNIT_ID_MASK;
-				count = (flags >> HT_PRIMARY_UNIT_COUNT_OFFSET) & HT_PRIMARY_UNIT_COUNT_MASK;
+				flags |= (next_unitid & HT_PRIMARY_BASE_UNIT_ID_MASK);
+				count = (flags >> HT_PRIMARY_UNIT_COUNT_OFFSET);
+				count &= HT_PRIMARY_UNIT_COUNT_MASK;
    			devx = PCI_DEV(0, next_unitid, 0);
    			next_unitid += count;

@@ -140,16 +162,19 @@
    				ctrl = pci_read_config16(devx, pos + ctrl_off);
    				/* Is this the end of the hypertransport chain? */
    				if (ctrl & HT_LINK_CTRL_END_OF_CHAIN) {
-						goto out;
+						ht_chain_finalize(ht_dev_num, real_last_unitid,
+								  real_last_pos, end_used);
+						return;
    				}

if (ctrl & (HT_LINK_CTRL_LINK_FAIL | HT_LINK_CTRL_CRC_UNRECOV_ERR)) {
    					/*
-						 * Either the link has failed, or we have
-						 * a CRC error.
-						 * Sometimes this can happen due to link
-						 * retrain, so lets knock it down and see
-						 * if its transient
+						 * Either the link has failed,
+						 * or we have a CRC error.
+						 * Sometimes this can happen
+						 * due to link retrain, so lets
+						 * knock it down and see if its
+						 * transient
    					 */
    					ctrl |= (HT_LINK_CTRL_LINK_FAIL | HT_LINK_CTRL_CRC_UNRECOV_ERR);
    					pci_write_config16(devx, pos + ctrl_off, ctrl);
@@ -166,18 +191,6 @@
    		pos = pci_s_find_next_capability(PCI_DEV(0,0,0), PCI_CAP_ID_HT, 0);
    	}
    } while (last_unitid != next_unitid);
-
-out:	;
-	if (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20) {
-		if ((ht_dev_num > 1) && 
-		    (real_last_unitid != CONFIG_HT_CHAIN_END_UNITID_BASE) && !end_used) {
-			u16 flags;
-			flags = pci_read_config16(PCI_DEV(0,real_last_unitid,0), real_last_pos + PCI_CAP_FLAGS);
-			flags &= ~HT_PRIMARY_BASE_UNIT_ID_MASK;
-			flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & HT_PRIMARY_BASE_UNIT_ID_MASK;
-			pci_write_config16(PCI_DEV(0, real_last_unitid, 0), real_last_pos + PCI_CAP_FLAGS, flags);
-		}
-	}
 }

void bootblock_early_northbridge_init(void) {