Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45448 )
Change subject: nb/intel/gm45: Add more DMIBAR/EPBAR registers ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45448/3/src/northbridge/intel/gm45/... File src/northbridge/intel/gm45/pcie.c:
https://review.coreboot.org/c/coreboot/+/45448/3/src/northbridge/intel/gm45/... PS3, Line 42: ;
I don't see that commit anywhere, I suppose it needs to be made? […]
I've decided to spend as little effort as possible on cosmetics, especially if there's any form of disagreement about it. I get nothing good out of any cosmetic changes I make, so I'd rather spend my time doing anything else. So, I decided to not touch the semicolon position with this patch. And then I recalled why I moved the semicolons to the next line in the first place: Jenkins complains about it.