Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48340 )
Change subject: soc/intel/alderlake: Revise PCIE port config ......................................................................
Patch Set 12:
(2 comments)
https://review.coreboot.org/c/coreboot/+/48340/9/src/soc/intel/alderlake/rom... File src/soc/intel/alderlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/48340/9/src/soc/intel/alderlake/rom... PS9, Line 25: 0xFF `PCIE_CLK_NOTUSED`
https://review.coreboot.org/c/coreboot/+/48340/9/src/soc/intel/alderlake/rom... PS9, Line 38: 0xff PCIE_CLK_NOTUSED