12 Aug
2020
12 Aug
'20
12:58 p.m.
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43791 )
Change subject: soc/intel/jasperlake: Add FSP UPDs for minimum assertion widths ......................................................................
Patch Set 8: Code-Review+1
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Gerrit-Change-Id: I042e8e34b7dfda3bc21e5f2e6727cb7692ffc7f7
Gerrit-Change-Number: 43791
Gerrit-PatchSet: 8
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Gerrit-Comment-Date: Wed, 12 Aug 2020 10:58:59 +0000
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