[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/skylake: Avoid TOL_1V8 being set for GPP_F4 ~ GPP_F11

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31368 )

Change subject: soc/intel/skylake: Avoid TOL_1V8 being set for GPP_F4 ~ GPP_F11
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Patch Set 7:

(2 comments)

https://review.coreboot.org/#/c/31368/7/src/soc/intel/common/block/include/i... 
File src/soc/intel/common/block/include/intelblocks/gpio.h:

https://review.coreboot.org/#/c/31368/7/src/soc/intel/common/block/include/i... 
PS7, Line 202: reg
Maybe reg_val? Just to make it clear that this is the register value. Can you please add a comment indicating what each param indicates?

https://review.coreboot.org/#/c/31368/7/src/soc/intel/skylake/gpio.c 
File src/soc/intel/skylake/gpio.c:

https://review.coreboot.org/#/c/31368/7/src/soc/intel/skylake/gpio.c@175 
PS7, Line 175: #if !IS_ENABLED(CONFIG_SKYLAKE_SOC_PCH_H)
             : 	/*
Just use:
if (IS_ENABLED(CONFIG_SKYLAKE_SOC_PCH_H))
    return;

...