Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36627 )
Change subject: soc/intel/icelake: Refactor pch_early_init() code
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Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36627/5/src/soc/intel/icelake/romst...
File src/soc/intel/icelake/romstage/pch.c:
https://review.coreboot.org/c/coreboot/+/36627/5/src/soc/intel/icelake/romst...
PS5, Line 58: /*
: * Enabling ABASE for accessing PM1_STS, PM1_EN, PM1_CNT,
: * GPE0_STS, GPE0_EN registers.
: */
Wouldn't the acpibase configuration also have to be done in bootblock since it is required to access […]
yes it should
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Gerrit-Project: coreboot
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