Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/20993
Change subject: soc/intel/skylake: Fix gpio pad reset config discrepency ......................................................................
soc/intel/skylake: Fix gpio pad reset config discrepency
The pad reset config field values for RSMRST differ between GPP (Primary well GPIOs) and GPD (Deep Sleep Well GPIOs) pads. Currently same value (11b) is being used for both. To eliminate the confusion add separate macros for each config.
BUG=b:64386481 TEST=Check if the pad config is repserved across reset when RSMRST is selected
Change-Id: Ib5c2b90a5af022ceb7312ff56fa8b4cc31ef8b8c Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com --- M src/soc/intel/skylake/include/soc/gpio_defs.h 1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/20993/1
diff --git a/src/soc/intel/skylake/include/soc/gpio_defs.h b/src/soc/intel/skylake/include/soc/gpio_defs.h index 34461f2..90c54c5 100644 --- a/src/soc/intel/skylake/include/soc/gpio_defs.h +++ b/src/soc/intel/skylake/include/soc/gpio_defs.h @@ -224,7 +224,8 @@ #define PADRSTCFG_DSW_PWROK 0 #define PADRSTCFG_DEEP 1 #define PADRSTCFG_PLTRST 2 -#define PADRSTCFG_RSMRST 3 +#define PADRSTCFG_GPP_RSMRST 0 +#define PADRSTCFG_GPD_RSMRST 3 /* RXPADSTSEL - raw signal or internal state */ #define RXPADSTSEL_SHIFT 29 #define RXPADSTSEL_MASK 0x1