Attention is currently required from: Dolan Liu, Jianeng Ceng, Nick Vaccaro, Paul Menzel, Subrata Banik, Weimin Wu.
Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80259?usp=email )
Change subject: mb/google/nissa/var/anraggar: Config DP AUX BIAS according to fw_config
......................................................................
Patch Set 10:
(1 comment)
File src/mainboard/google/brya/variants/anraggar/variant.c:
https://review.coreboot.org/c/coreboot/+/80259/comment/8a3088d2_3e8b6f52 :
PS10, Line 32: 0
Yes, for Anraggar project, TCP0(C0) is connected to DB, TCP1(C1) is connected to MB.
Two questions:
1. Why config for C1 (MB) is changed in the above code.
```
config->typec_aux_bias_pads[1].pad_auxp_dc = GPP_E22;
config->typec_aux_bias_pads[1].pad_auxn_dc = GPP_E23;
```
2. There is no `else` case for REDRIVER (vs SOC).
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