Leroy P Leahy (leroy.p.leahy@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15133
-gerrit
commit 4b745f6564bb61023fb02813fbcdfc446949c923 Author: Lee Leahy leroy.p.leahy@intel.com Date: Wed Jun 8 14:01:05 2016 -0700
mainboard/intel/galileo: Support bootblock in C
Initialize the GPIOs during the boot block to properly route the SOC UART pins.
TEST=Build and run on Galileo Gen2
Change-Id: I22c24f8c83f04566a0bbd598a141a5209569a924 Signed-off-by: Lee Leahy Leroy.P.Leahy@intel.com --- src/mainboard/intel/galileo/Makefile.inc | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/src/mainboard/intel/galileo/Makefile.inc b/src/mainboard/intel/galileo/Makefile.inc index 83fb0db..cbcbf81 100644 --- a/src/mainboard/intel/galileo/Makefile.inc +++ b/src/mainboard/intel/galileo/Makefile.inc @@ -17,6 +17,11 @@ ifeq ($(CONFIG_PLATFORM_USES_FSP1_1),y) CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/quark endif
+ifeq ($(CONFIG_C_ENVIRONMENT_BOOTBLOCK),y) +bootblock-y += gpio.c +bootblock-y += reg_access.c +endif + romstage-y += gpio.c romstage-y += reg_access.c