[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge: Add comment to TC_RWP write

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48602 )

Change subject: nb/intel/sandybridge: Add comment to TC_RWP write
......................................................................

nb/intel/sandybridge: Add comment to TC_RWP write

Change-Id: I164daa59696f2fe8de3a4b3e7da46c7c723778eb
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48602
Reviewed-by: Felix Held 
Tested-by: build bot (Jenkins) 
---
M src/northbridge/intel/sandybridge/raminit_common.c
1 file changed, 4 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved

diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 9b364ab..a21caea 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -1885,6 +1885,10 @@
    int channel, slotrank;
    int err;

+	/*
+	 * Set the DEC_WRD bit, required for the write flyby algorithm.
+	 * Needs to be done before starting the write training procedure.
+	 */
    FOR_ALL_POPULATED_CHANNELS
    	MCHBAR32_OR(TC_RWP_ch(channel), 1 << 27);