Paul Menzel (paulepanter@users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5885
-gerrit
commit b1622b99c092713d1e19016deeab1f4a71c8829d Author: Paul Menzel paulepanter@users.sourceforge.net Date: Fri May 30 14:27:32 2014 +0200
northbridge/intel/i945/raminit.c: Set register Base of Stolen Memory
Since Linux 3.12, the base address of stolen DRAM memory is read from the register BSM (Base of Stolen Memory) [1]. This register is currently not set by coreboot and with native graphics init, this causes crashes. The VGA BIOS/Option ROM sets this register and therefore it still works with it.
So set this register and use a graphics stolen memory size of 64 MB. This should be made run time configurable using NVRAM/CMOS.
The coding style from the file is used although it is not the official one.
The datasheet says the bits of the BSM register are RO (Read Only), but the datasheet is not intended for BIOS/firmware developers but for operating system/driver developers.
[1] http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/mobil... Mobile Intel® 945 Express Chipset Family Document Number: 309219-006
Change-Id: I9aab68374d95cf6883337261ddc59f6c3946e21e Signed-off-by: Paul Menzel paulepanter@users.sourceforge.net --- src/northbridge/intel/i945/raminit.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 885b49d..2c0c47e 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -1569,6 +1569,21 @@ static int sdram_program_row_boundaries(struct sys_info *sysinfo)
pci_write_config16(PCI_DEV(0,0,0), TOM, tom);
+ /* + * Set BSM (Base of Stolen Memory) + * + * Assume a size of 64MB and set the base address of stolen DRAM memory + * to TOLUD - size. + * + * TODO: This should be made run-time configurable with NVRAM/CMOS. + * The size can range from 1MB to 64MB. + */ +#if IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) + pci_write_config32(PCI_DEV(0,2,0), BSM, (tolud * MiB - 64 * MiB) & 0xfff00000); +#endif + + printk(BIOS_DEBUG, "BSM = 0x%08x\n", pci_read_read32(PCI_DEV(0,2,0), BSM)); + return 0; }