Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31363 )
Change subject: mb/gigabyte: add GA-P67A-UD3R ......................................................................
Patch Set 2: Code-Review+1
(5 comments)
https://review.coreboot.org/#/c/31363/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31363/2//COMMIT_MSG@42 PS2, Line 42: - PS/2 keyboard/mouse As a side note: this is likely to be broken on IT8728 code, recently tested those ports on GA-H61M-S2PV and it doesn't work. It could also be mainboard-specific code is missing, but I haven't debugged any further.
(nothing to change on the commit message)
https://review.coreboot.org/#/c/31363/2/src/mainboard/gigabyte/ga-p67a-ud3r/... File src/mainboard/gigabyte/ga-p67a-ud3r/cmos.layout:
https://review.coreboot.org/#/c/31363/2/src/mainboard/gigabyte/ga-p67a-ud3r/... PS2, Line 62: # coreboot config options: northbridge : #432 3 r 0 unused This can be removed
https://review.coreboot.org/#/c/31363/2/src/mainboard/gigabyte/ga-p67a-ud3r/... PS2, Line 65: # SandyBridge MRC Scrambler Seed values : 896 32 r 0 mrc_scrambler_seed : 928 32 r 0 mrc_scrambler_seed_s3 : 960 16 r 0 mrc_scrambler_seed_chk These shouldn't be needed for native raminit.
https://review.coreboot.org/#/c/31363/2/src/mainboard/gigabyte/ga-p67a-ud3r/... File src/mainboard/gigabyte/ga-p67a-ud3r/devicetree.cb:
https://review.coreboot.org/#/c/31363/2/src/mainboard/gigabyte/ga-p67a-ud3r/... PS2, Line 80: device pci 00.0 on # PCI bridge : subsystemid 0x1458 0x5000 : end Were the PCI ports tested?
https://review.coreboot.org/#/c/31363/2/src/mainboard/gigabyte/ga-p67a-ud3r/... File src/mainboard/gigabyte/ga-p67a-ud3r/romstage.c:
https://review.coreboot.org/#/c/31363/2/src/mainboard/gigabyte/ga-p67a-ud3r/... PS2, Line 33: CNF2_LPC_EN This is for decoding I/O locations 4Eh and 4Fh to the LPC interface. The SuperIO is on 2Eh / 2Fh, so it doesn't seem to be needed, unless there is some other chip on the board.