Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/28956 )
Change subject: src: Standardize PCI_DEV(0, 0x1f, 0) name ......................................................................
Patch Set 5: Code-Review-1
(1 comment)
https://review.coreboot.org/#/c/28956/5/src/southbridge/intel/bd82x6x/pch.h File src/southbridge/intel/bd82x6x/pch.h:
https://review.coreboot.org/#/c/28956/5/src/southbridge/intel/bd82x6x/pch.h@... PS5, Line 133: LPC_DEV PCI_DEV(0, 0x1f, 0)
But now this doesn't match all of the other #defines for the platform. […]
I agree.... we have many #defines for LPC : we have PCH_LPC_DEV, LPC_DEV ... and even SOUTHBRIDGE is defined as LPC dev ...