[coreboot-gerrit] [L] Change in coreboot[main]: soc/intel/xeon_sp/spr: Support dynamic domain SSDT generation

[Arthur Heymans (Code Review)]

Attention is currently required from: Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu.

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81377?usp=email )

Change subject: soc/intel/xeon_sp/spr: Support dynamic domain SSDT generation
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Patch Set 19:

(1 comment)

File src/soc/intel/xeon_sp/spr/soc_acpi.c:

https://review.coreboot.org/c/coreboot/+/81377/comment/abc0aa48_0a1e3ce4 :
PS19, Line 226: Domain0 device defined in uncore.asl
maybe state that it's needed to access IO on PCH in DSDT?