build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35555 )
Change subject: soc/mediatek/mt8183: Run calibration with multiple frequencies for DVFS switch ......................................................................
Patch Set 23:
(4 comments)
https://review.coreboot.org/c/coreboot/+/35555/23/src/soc/mediatek/mt8183/em... File src/soc/mediatek/mt8183/emi.c:
https://review.coreboot.org/c/coreboot/+/35555/23/src/soc/mediatek/mt8183/em... PS23, Line 487: (u8 *)&ch[chn].ao + dramc_regs2[index].start + SHU_GRP_DRAMC_OFFSET); line over 96 characters
https://review.coreboot.org/c/coreboot/+/35555/23/src/soc/mediatek/mt8183/em... PS23, Line 489: (u8 *)&ch[chn].ao + dramc_regs2[index].end + SHU_GRP_DRAMC_OFFSET * 2); line over 96 characters
https://review.coreboot.org/c/coreboot/+/35555/23/src/soc/mediatek/mt8183/em... PS23, Line 528: (u8 *)&ch[chn].phy + phy_regs2[index].start + SHU_GRP_DDRPHY_OFFSET); line over 96 characters
https://review.coreboot.org/c/coreboot/+/35555/23/src/soc/mediatek/mt8183/em... PS23, Line 530: (u8 *)&ch[chn].phy + phy_regs2[index].end + SHU_GRP_DDRPHY_OFFSET * 0); line over 96 characters