Attention is currently required from: Jason Glenesk, Raul Rangel, Furquan Shaikh, Martin Roth, Marshall Dawson, Felix Held.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51924 )
Change subject: soc/amd/common: Handle power resume after power failure
......................................................................
Patch Set 4:
(4 comments)
File src/soc/amd/common/block/pm/Kconfig:
https://review.coreboot.org/c/coreboot/+/51924/comment/250af169_3af24387
PS1, Line 3: depends on
Marked it as "depends on" since it depends on pm_io_read8/pm_io_write8 implementation in SOC_AMD_COM […]
Marking as resolved.
File src/soc/amd/common/block/pm/pmlib.c:
https://review.coreboot.org/c/coreboot/+/51924/comment/eeddade4_71060de5
PS2, Line 42: PM_RTC_SHADOW_REG
In the PPR, there is a mention for BIOS to set it to 4 i.e. set bit 2. […]
Marking it as resolved.
File src/soc/amd/common/block/pm/pmlib.c:
https://review.coreboot.org/c/coreboot/+/51924/comment/5f609b91_27483bfd
PS3, Line 9: PWR_FAIL_INIT
Can you please add that as a comment?
Done
https://review.coreboot.org/c/coreboot/+/51924/comment/2c1fc47f_4257897b
PS3, Line 21: state
nit: Use `CONFIG_MAINBOARD_POWER_FAILURE_STATE` directly here?
Done
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