[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode

[Aamir Bohra (Code Review)]

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43494 )

Change subject: soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode
......................................................................

Patch Set 7:

(3 comments)

https://review.coreboot.org/c/coreboot/+/43494/3//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43494/3//COMMIT_MSG@23 
PS3, Line 23: mas
> maps

Done

https://review.coreboot.org/c/coreboot/+/43494/3//COMMIT_MSG@20 
PS3, Line 20: 
            : Also the COS mask selection is mapped to bit 32:33 of MSR
            : IA32_PQR_ASSOC(0xC8F) and need to be updated in edx(maps 63:32) before
            : MSR write instead of eax(mas 31:0). This implementation corrects that
            : as well.
> yes, MSR definition is not documented for TGL, CML, KBL. We can get it revised.

Done

https://review.coreboot.org/c/coreboot/+/43494/3/src/soc/intel/common/block/... 
File src/soc/intel/common/block/cpu/car/cache_as_ram.S:

PS3:
> yes, we configure the mask2 with the RW data mapped ways configured for eviction and start filling i […]

Done