[coreboot-gerrit] [M] Change in coreboot[main]: cpu/x86: Support SMBASE relocation-only use-case

[Benjamin Doron (Code Review)]

Attention is currently required from: Angel Pons, Dinesh Gehlot, Eran Mitrani, Felix Held, Fred Reitberger, Jason Glenesk, Kapil Porwal, Martin L Roth, Matt DeVillier, Matt DeVillier, Maulik Vaghela, Raul Rangel, Subrata Banik, Tarun, Tarun Tuli, ron minnich.

Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70376?usp=email )

Change subject: cpu/x86: Support SMBASE relocation-only use-case
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Patch Set 7:

(1 comment)

File src/southbridge/intel/common/Kconfig.common:

https://review.coreboot.org/c/coreboot/+/70376/comment/10db7338_3237e1d9 :
PS7, Line 93: HAVE_SMI_HANDLER
> Ah, because from memory, this would leave SPI, etc. […]

Hmm, this omits `southbridge_finalize_all()`. Not great. i82801gx locks SPI using ramstage, it's the others that perform more extensive locking in SMM. Optimally, this could be performed in ramstage, I may end up looking into that. There's an alternative, sort of a workaround: make this use case depend on 'not SOUTHBRIDGE_INTEL_COMMON'

This brings up the bigger issue of APM_CNT_FINALIZE. For the platforms we expect to actually enable this, SOC_INTEL_COMMON, most lockdown is complete: it omits mb/google/dedede EC's lock, `soc_lock_gpios()` and disabling HECI on some SoCs.