[coreboot-gerrit] [S] Change in coreboot[main]: soc/mediatek/mt8196: Add dram type define to coreboot

[Jarried Lin (Code Review)]

Attention is currently required from: Crystal Guo, Hung-Te Lin, Yidi Lin, Yu-Ping Wu.

Hello Crystal Guo,

I'd like you to do a code review.
Please visit

https://review.coreboot.org/c/coreboot/+/85099?usp=email

to review the following change.

Change subject: soc/mediatek/mt8196: Add dram type define to coreboot
......................................................................

soc/mediatek/mt8196: Add dram type define to coreboot

Implement map_to_lpddr_dram_type to convert MT8196 specific
DRAM_DRAM_TYPE_T values to mem_chip_type.

BUG=b:357743097
TEST=Firmware shows the following log:
LPDDR5 chan0(x16) rank0: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan0(x16) rank1: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan1(x16) rank0: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan1(x16) rank1: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan2(x16) rank0: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan2(x16) rank1: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan3(x16) rank0: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan3(x16) rank1: density 12288mbits x16, MF 06 rev 0800

Change-Id: I63ce238ff0fbcdde9020a7cf4fee2e29d6decf37
Signed-off-by: Crystal Guo 
---
M src/soc/mediatek/mt8196/Makefile.mk
M src/soc/mediatek/mt8196/include/soc/dramc_soc.h
A src/soc/mediatek/mt8196/memory.c
3 files changed, 37 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/85099/1

diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk
index 2493464..3d04a5d 100644
--- a/src/soc/mediatek/mt8196/Makefile.mk
+++ b/src/soc/mediatek/mt8196/Makefile.mk
@@ -23,7 +23,7 @@
 romstage-y += ../common/emi.c
 romstage-y += irq2axi.c
 romstage-y += l2c_ops.c
-romstage-y += ../common/memory.c
+romstage-y += ../common/memory.c memory.c
 romstage-y += ../common/memory_test.c
 romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c

diff --git a/src/soc/mediatek/mt8196/include/soc/dramc_soc.h b/src/soc/mediatek/mt8196/include/soc/dramc_soc.h
index dde00c2..c01daf5 100644
--- a/src/soc/mediatek/mt8196/include/soc/dramc_soc.h
+++ b/src/soc/mediatek/mt8196/include/soc/dramc_soc.h
@@ -43,6 +43,23 @@
    IMP_DRV_MAX,
 } DRAM_IMP_DRV_T;

+typedef enum {
+	TYPE_DDR1 = 1,
+	TYPE_DDR2,
+	TYPE_DDR3,
+	TYPE_DDR4,
+	TYPE_DDR5,
+	TYPE_LPDDR2,
+	TYPE_LPDDR3,
+	TYPE_PCDDR3,
+	TYPE_LPDDR4,
+	TYPE_LPDDR4X,
+	TYPE_LPDDR4P,
+	TYPE_LPDDR5,
+	TYPE_LPDDR5X,
+	TYPE_MAX,
+} DRAM_DRAM_TYPE_T;
+
 #define DRAM_DFS_SHU_MAX	DRAM_DFS_SRAM_MAX
 #define DQS_NUMBER_LP5		2
 #define DQ_DATA_WIDTH_LP5	16
diff --git a/src/soc/mediatek/mt8196/memory.c b/src/soc/mediatek/mt8196/memory.c
new file mode 100644
index 0000000..2689e5a
--- /dev/null
+++ b/src/soc/mediatek/mt8196/memory.c
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <stdint.h>
+#include <commonlib/bsd/mem_chip_info.h>
+#include <soc/emi.h>
+
+enum mem_chip_type map_to_lpddr_dram_type(uint16_t lpddr_type)
+{
+	switch (lpddr_type) {
+	case TYPE_LPDDR4X:
+		return MEM_CHIP_LPDDR4X;
+	case TYPE_LPDDR5:
+		return MEM_CHIP_LPDDR5;
+	case TYPE_LPDDR5X:
+		return MEM_CHIP_LPDDR5X;
+	default:
+		return MEM_CHIP_UNDEFINED;
+	}
+}