[coreboot-gerrit] Change in coreboot[master]: mb/tglrvp: Update SPD files for Hynix

[Anil Kumar K (Code Review)]

Hello Shreesh Chhabbi, Ravishankar Sarawadi, Srinidhi N Kaushik,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/44149

to look at the new patch set (#2).

Change subject: mb/tglrvp: Update SPD files for Hynix
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mb/tglrvp: Update SPD files for Hynix

- Increase DDR Frquency limit to support data rate 4266 Mbps

Bug=None
Test=Build and boot on tglrvp hardware;
     $dmidecode --type 17 reflects memory Speed = 4266

Signed-off-by: Anil Kumar 
Change-Id: I8185ebbaa32a01fee104bc0b757fc4adb58bba97
---
M src/mainboard/intel/tglrvp/spd/Hynix-H9HKNNNEBMAV-4267.spd.hex
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/44149/2