Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50254 )
Change subject: vc/intel/fsp/fsp2_0/alderlake: Add required macros into MemInfoHob.h ......................................................................
vc/intel/fsp/fsp2_0/alderlake: Add required macros into MemInfoHob.h
The recent merge of Intel ADL FSP 2017.00 appears to have introduced a new dependency within the file MemInfoHob.h. Adding required macros to resolve the dependency.
Change-Id: I18370edca481bac5fdd483680cd7b05b216d10fc Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/vendorcode/intel/fsp/fsp2_0/alderlake/MemInfoHob.h 1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/50254/1
diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/MemInfoHob.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/MemInfoHob.h index 816ce06..0b65eda 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/MemInfoHob.h +++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/MemInfoHob.h @@ -4,7 +4,7 @@ data hobs.
@copyright - Copyright (c) 1999 - 2020, Intel Corporation. All rights reserved.<BR> + Copyright (c) 1999 - 2021, Intel Corporation. All rights reserved.<BR> This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License that accompanies this distribution. The full text of the license may be found at @@ -153,6 +153,9 @@ #define MAX_PROFILE_NUM 4 // number of memory profiles supported #define MAX_XMP_PROFILE_NUM 2 // number of XMP profiles supported
+#define MAX_TRACE_REGION 5 +#define MAX_TRACE_CACHE_TYPE 2 + // // DIMM timings //