[coreboot-gerrit] Change in coreboot[master]: soc/intel/braswell/bootblock/bootblock.c: Report the FSP-T output

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47759 )

Change subject: soc/intel/braswell/bootblock/bootblock.c: Report the FSP-T output
......................................................................

soc/intel/braswell/bootblock/bootblock.c: Report the FSP-T output

Report the FSP temporary RAM location

Tested on Facebook FBG1701

Change-Id: Ia2ce48f7a7948d1fe51ad1ca33b8fb385674cb41
Signed-off-by: Frans Hendriks 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47759
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Arthur Heymans 
---
M src/soc/intel/braswell/bootblock/bootblock.c
1 file changed, 3 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved
  Angel Pons: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/braswell/bootblock/bootblock.c b/src/soc/intel/braswell/bootblock/bootblock.c
index 10ac025..ae1c97a 100644
--- a/src/soc/intel/braswell/bootblock/bootblock.c
+++ b/src/soc/intel/braswell/bootblock/bootblock.c
@@ -5,6 +5,7 @@
 #include <build.h>
 #include <console/console.h>
 #include <device/pci_ops.h>
+#include <fsp/util.h>
 #include <pc80/mc146818rtc.h>
 #include <soc/gpio.h>
 #include <soc/iomap.h>
@@ -117,6 +118,8 @@
 }
 void bootblock_soc_init(void)
 {
+	report_fsp_output();
+
    /* Continue chipset initialization */
    soc_rtc_init();
    set_max_freq();