Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38345 )
Change subject: autoport: Add Xeon E3-1200 v2 memory controller ID ......................................................................
autoport: Add Xeon E3-1200 v2 memory controller ID
Signed-off-by: Jonathan A. Kollasch jakllsch@kollasch.net Change-Id: Ic5f18669a04397f570d49c1ff056cd90b3eb04a1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38345 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Idwer Vollering vidwer@gmail.com Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net --- M util/autoport/sandybridge.go 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Idwer Vollering: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved
diff --git a/util/autoport/sandybridge.go b/util/autoport/sandybridge.go index 718fbe8..acfda6b 100644 --- a/util/autoport/sandybridge.go +++ b/util/autoport/sandybridge.go @@ -126,6 +126,7 @@ RegisterPCI(0x8086, 0x0104, sandybridgemc{}) RegisterPCI(0x8086, 0x0150, sandybridgemc{}) RegisterPCI(0x8086, 0x0154, sandybridgemc{}) + RegisterPCI(0x8086, 0x0158, sandybridgemc{}) for _, id := range []uint16{ 0x0102, 0x0106, 0x010a, 0x0112, 0x0116, 0x0122, 0x0126,