Attention is currently required from: Wisley Chen. Hello Wisley Chen,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/59269
to review the following change.
Change subject: mb/google/brya/var/redrix: De-assert SSD PERST# in romstage ......................................................................
mb/google/brya/var/redrix: De-assert SSD PERST# in romstage
After CB:57539 applied, it can support romstage GPIO table override. We can move SSD PERST# de-assertion to romstage.
BUG=b:199714453 TEST=build
Signed-off-by: Wisley Chen wisley.chen@quanta.corp-partner.google.com Change-Id: I242cb1517f564d9d135d523b1e7f95ac34d601f8 --- M src/mainboard/google/brya/variants/redrix/gpio.c 1 file changed, 3 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/59269/1
diff --git a/src/mainboard/google/brya/variants/redrix/gpio.c b/src/mainboard/google/brya/variants/redrix/gpio.c index 6182ec2..5fd26d4 100644 --- a/src/mainboard/google/brya/variants/redrix/gpio.c +++ b/src/mainboard/google/brya/variants/redrix/gpio.c @@ -113,7 +113,7 @@ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* * enable EN_PP3300_SSD in bootblock, then PERST# is asserted, and - * then deassert PERST# in ramstage + * then deassert PERST# in romstage */ /* H13 : I2C7_SCL ==> EN_PP3300_SD */ PAD_CFG_GPO(GPP_H13, 1, DEEP), @@ -122,6 +122,8 @@ };
static const struct pad_config romstage_gpio_table[] = { + /* B4 : PROC_GP3 ==> SSD_PERST_L */ + PAD_CFG_GPO(GPP_B4, 1, DEEP), /* F21 : EXT_PWR_GATE2# ==> WWAN_FCPO_L (set here for correct power sequencing) */ PAD_CFG_GPO(GPP_F21, 1, DEEP), };