[coreboot-gerrit] [S] Change in coreboot[main]: block/fast_spi: Use read32p/write32p for SPI RW

[Ashish Kumar Mishra (Code Review)]

Attention is currently required from: Arthur Heymans, Patrick Rudolph, Paul Menzel, Saurabh Mishra, Subrata Banik.

Ashish Kumar Mishra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82079?usp=email )

Change subject: block/fast_spi: Use read32p/write32p for SPI RW
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Patch Set 5:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/82079/comment/4f9f6223_165dd33b :
PS5, Line 14: TEST=Build and boot mtl 64-bit and verified MRC cache working.
> can you please highlight if you have tested this CL with both existing 32-bit and future 64-bit plat […]

Sure. This I have tested with RPL(brox/skolas) and future 64 bit platforms as well.