Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42765 )
Change subject: soc/amd/common: Don't init SMIs or SCIs in psp_verstage
......................................................................
Patch Set 3: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/42765/3/src/soc/amd/common/block/gp...
File src/soc/amd/common/block/gpio_banks/gpio.c:
https://review.coreboot.org/c/coreboot/+/42765/3/src/soc/amd/common/block/gp...
PS3, Line 186: const bool can_set_smi_flags = !(CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) && ENV_SEPARATE_VERSTAGE);
line over 96 characters
Please fix.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/42765
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I40eb464cde6b233607de1e177702c643ea2b4bb2
Gerrit-Change-Number: 42765
Gerrit-PatchSet: 3
Gerrit-Owner: Martin Roth
martinroth@google.com
Gerrit-Reviewer: Aaron Durbin
adurbin@chromium.org
Gerrit-Reviewer: Raul Rangel
rrangel@chromium.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Thu, 25 Jun 2020 20:45:39 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Comment-In-Reply-To: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-MessageType: comment