[coreboot-gerrit] [S] Change in coreboot[master]: src/soc/intel/alderlake: Add RMT Plus support

[Gaggery Tsai (Code Review)]

Attention is currently required from: Subrata Banik, Tarun Tuli.

Gaggery Tsai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/77256?usp=email )

Change subject: src/soc/intel/alderlake: Add RMT Plus support
......................................................................

src/soc/intel/alderlake: Add RMT Plus support

This patch adds Intel RMT plus support. It enables RMT plus feature
through the FSPM UPD. The ACPI_BDAT config is also enabled, the
RMT information will be passed to the OS through ACPI BDAT.

BUG=b:293441360
TEST=1. Add -DBDAT_SUPPORT=1 to build FSP packages.
     2. Enable SOC_INTEL_RMT_PLUS flag with Brya.
     3. Flash the image on Brya and ensure BDAT ACPI table is
        available under /sys/firmware/acpi/tables/.

Change-Id: I3b07d12e7701628f791e6a0f5f1d14b2e7673bc4
Signed-off-by: Gaggery Tsai 
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/alderlake/romstage/fsp_params.c
2 files changed, 20 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/77256/1

diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 480eb30..608b186 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -149,6 +149,13 @@
    select SOC_INTEL_COMMON_BLOCK_USB4_PCIE
    select SOC_INTEL_COMMON_BLOCK_USB4_XHCI

+config SOC_INTEL_RMT_PLUS
+	bool
+	default n
+	select SOC_INTEL_COMMON_ACPI_BDAT
+	help
+	  Intel RMT plus feature
+
 config ALDERLAKE_CONFIGURE_DESCRIPTOR
    bool
    help
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index 59cd8ff..93a4974 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -154,6 +154,19 @@
 {
    m_cfg->SaGv = config->sagv;
    m_cfg->RMT = config->RMT;
+
+#if CONFIG(SOC_INTEL_RMT_PLUS)
+	printk(BIOS_INFO, "RMT Plus is enabled.\n");
+	/* Enable SaGv */
+	m_cfg->SaGv = 5;
+	/* Enable RMT */
+	m_cfg->RMT = 1;
+	/* Eanble BDAT support */
+	m_cfg->BdatEnable = 1;
+	/* Per Bit Rank Margin Data */
+	m_cfg->BdatTestType = 1;
+#endif
+
    if (config->max_dram_speed_mts) {
    	m_cfg->DdrFreqLimit = config->max_dram_speed_mts;
    	m_cfg->DdrSpeedControl = 1;