Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34662 )
Change subject: Documentation/binaries: Add AMD FSP documentation ......................................................................
Patch Set 2:
(4 comments)
https://review.coreboot.org/c/coreboot/+/34662/2/Documentation/binaries/amd/... File Documentation/binaries/amd/AMD_FSP_family_17h.md:
https://review.coreboot.org/c/coreboot/+/34662/2/Documentation/binaries/amd/... PS2, Line 12: * Reset vector is not the old 0xFFFFFFF0. Expand on this some?
https://review.coreboot.org/c/coreboot/+/34662/2/Documentation/binaries/amd/... PS2, Line 25: PSP can be made to load a section of the flash into RAM Maybe "The PSP typically loads the boot vector and associated code into RAM"?
The way it was previously phrased makes it sound like it's a trick.
https://review.coreboot.org/c/coreboot/+/34662/2/Documentation/binaries/amd/... PS2, Line 40: 4. **Platform specific code** : Similar to AGESA, FSP will make call back to platform specific code. : Hrm. This is the first I've heard of this, and could create significant problems. This was allowed in AGESA because it was open-sourced. Some people consider this to be "linking" the binaries, and therefore a violation of the GPL.
What are we calling back into coreboot for?
https://review.coreboot.org/c/coreboot/+/34662/2/Documentation/binaries/cavi... File Documentation/binaries/cavium/index.md:
https://review.coreboot.org/c/coreboot/+/34662/2/Documentation/binaries/cavi... PS2, Line 7: ## Platform initialization : - [AMD FSP](AMD_FSP_family_17h.md) What does this have to do with cavium?