[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/elkhartlake/pmc,gpio: Fix PMC GPE GPIO routes

[Matt DeVillier (Code Review)]

Attention is currently required from: Intel coreboot Reviewers, Jérémy Compostella, Michał Żygowski, Werner Zeh.

Matt DeVillier has posted comments on this change by Michał Żygowski. ( https://review.coreboot.org/c/coreboot/+/87050?usp=email )

Change subject: soc/intel/elkhartlake/pmc,gpio: Fix PMC GPE GPIO routes
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Patch Set 2: Code-Review+2

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/87050/comment/b04eb0cd_b9badfe5?usp... :
PS1, Line 7: elkahrtalake
> elkhartlake

Done

https://review.coreboot.org/c/coreboot/+/87050/comment/933e1c7b_52d8d6e8?usp... :
PS1, Line 10: R&DC
> R&DC is not necessary. The document title and number is the reference.

Done

https://review.coreboot.org/c/coreboot/+/87050/comment/f50de797_ca698e46?usp... :
PS1, Line 13: non-existent GPIO groups
> I mean, GPP_S exists, but there is no value for it in the PMC and GPIO GPE DW registers. […]

Acknowledged