build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44355 )
Change subject: soc/intel/tigerlake: Allow fine grained control of S0iX states ......................................................................
Patch Set 6:
(5 comments)
https://review.coreboot.org/c/coreboot/+/44355/6/src/soc/intel/tigerlake/chi... File src/soc/intel/tigerlake/chip.h:
https://review.coreboot.org/c/coreboot/+/44355/6/src/soc/intel/tigerlake/chi... PS6, Line 69: LPM_S0iX_ALL = LPM_S0i2_0 | LPM_S0i2_1 | LPM_S0i2_2 code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/44355/6/src/soc/intel/tigerlake/chi... PS6, Line 69: LPM_S0iX_ALL = LPM_S0i2_0 | LPM_S0i2_1 | LPM_S0i2_2 please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/44355/6/src/soc/intel/tigerlake/chi... PS6, Line 70: | LPM_S0i3_0 | LPM_S0i3_1 | LPM_S0i3_2 | LPM_S0i3_3 | LPM_S0i3_4, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/44355/6/src/soc/intel/tigerlake/chi... PS6, Line 70: | LPM_S0i3_0 | LPM_S0i3_1 | LPM_S0i3_2 | LPM_S0i3_3 | LPM_S0i3_4, please, no space before tabs
https://review.coreboot.org/c/coreboot/+/44355/6/src/soc/intel/tigerlake/chi... PS6, Line 70: | LPM_S0i3_0 | LPM_S0i3_1 | LPM_S0i3_2 | LPM_S0i3_3 | LPM_S0i3_4, please, no spaces at the start of a line