Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60666 )
Change subject: sb/intel/i82801jx/acpi: Replace LEqual(a,b) with ASL 2.0 syntax ......................................................................
sb/intel/i82801jx/acpi: Replace LEqual(a,b) with ASL 2.0 syntax
Replace `LEqual(a, b)` with `a == b`.
Change-Id: I3aebd29bba285229979b79867c881018f61e2060 Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/southbridge/intel/i82801jx/acpi/ich10.asl M src/southbridge/intel/i82801jx/acpi/lpc.asl 2 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/60666/1
diff --git a/src/southbridge/intel/i82801jx/acpi/ich10.asl b/src/southbridge/intel/i82801jx/acpi/ich10.asl index 0e4c03b..2324696 100644 --- a/src/southbridge/intel/i82801jx/acpi/ich10.asl +++ b/src/southbridge/intel/i82801jx/acpi/ich10.asl @@ -175,7 +175,7 @@ Method (_OSC, 4) { /* Check for proper GUID */ - If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) + If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) { /* Let OS control everything */ Return (Arg3) diff --git a/src/southbridge/intel/i82801jx/acpi/lpc.asl b/src/southbridge/intel/i82801jx/acpi/lpc.asl index b97b010..72e28eb 100644 --- a/src/southbridge/intel/i82801jx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801jx/acpi/lpc.asl @@ -72,15 +72,15 @@ { If (HPTE) { CreateDWordField(BUF0, _SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) - If (Lequal(HPAS, 1)) { + If (HPAS == 1) { HPT0 = CONFIG_HPET_ADDRESS + 0x1000 }
- If (Lequal(HPAS, 2)) { + If (HPAS == 2) { HPT0 = CONFIG_HPET_ADDRESS + 0x2000 }
- If (Lequal(HPAS, 3)) { + If (HPAS == 3) { HPT0 = CONFIG_HPET_ADDRESS + 0x3000 } }