[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge: Limit SRT to Ivy Bridge and slow RAM

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47568 )

Change subject: nb/intel/sandybridge: Limit SRT to Ivy Bridge and slow RAM
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nb/intel/sandybridge: Limit SRT to Ivy Bridge and slow RAM

Reference code never enables SRT for Sandy Bridge, and only enables it
for Ivy Bridge when the memory frequency is at most 1066 MHz.

Tested on Asus P8H61-M PRO, still boots.

Change-Id: I50527f311340584cf8290de2114ec2694cca3a83
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47568
Tested-by: build bot (Jenkins) 
Reviewed-by: Arthur Heymans 
---
M src/northbridge/intel/sandybridge/raminit_common.c
1 file changed, 3 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 4d478a0..453222e 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -759,13 +759,14 @@
 {
    u16 pasr, cwl, mr2reg;
    odtmap odt;
-	int srt;
+	int srt = 0;

pasr = 0;
    cwl = ctrl->CWL - 5;
    odt = get_ODT(ctrl, channel);

-	srt = ctrl->extended_temperature_range && !ctrl->auto_self_refresh;
+	if (IS_IVY_CPU(ctrl->cpu) && ctrl->tCK >= TCK_1066MHZ)
+		srt = ctrl->extended_temperature_range && !ctrl->auto_self_refresh;

mr2reg = 0;
    mr2reg = (mr2reg & ~0x07) | pasr;