[coreboot-gerrit] Change in coreboot[master]: soc/intel/jasperlake: Enable end of post support in FSP

[Aamir Bohra (Code Review)]

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40612 )

Change subject: soc/intel/jasperlake: Enable end of post support in FSP
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Patch Set 8:

(2 comments)

https://review.coreboot.org/c/coreboot/+/40612/5//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/40612/5//COMMIT_MSG@11 
PS5, Line 11: applicable
> My understanding here is that FSP in API mode runs only PEI. There is no DXE. […]

Yes Furquan. Updated the commit message.

https://review.coreboot.org/c/coreboot/+/40612/7/src/soc/intel/jasperlake/ch... 
File src/soc/intel/jasperlake/chip.h:

https://review.coreboot.org/c/coreboot/+/40612/7/src/soc/intel/jasperlake/ch... 
PS7, Line 151: /*
             : 	 * ME End of Post configuration
             : 	 * 0 - Disable EOP.
             : 	 * 1 - Send in PEI (Applicable for coreboot)
             : 	 * 2 - Send in DXE (Not applicable for coreboot)
             : 	 */
             : 	enum {
             : 		EOP_Disabled,
             : 		EOP_PEI,
             : 		EOP_DXE,
             : 	} EndOfPost;
> Any reason why this is living in chip.h instead of fsp_params. […]

No. Moved to fsp_params.c now.