Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35733 )
Change subject: intel/fsp_baytrail: Define PCH_DEV_SLOT_I2C1 ......................................................................
intel/fsp_baytrail: Define PCH_DEV_SLOT_I2C1
Change-Id: I02c08b847fa1523e3296bdf9e3db5a7a322df72e Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/35733 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Werner Zeh werner.zeh@siemens.com --- M src/soc/intel/fsp_baytrail/i2c.c M src/soc/intel/fsp_baytrail/include/soc/pci_devs.h 2 files changed, 5 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved
diff --git a/src/soc/intel/fsp_baytrail/i2c.c b/src/soc/intel/fsp_baytrail/i2c.c index 3ea91e3..5f6ca467 100644 --- a/src/soc/intel/fsp_baytrail/i2c.c +++ b/src/soc/intel/fsp_baytrail/i2c.c @@ -117,7 +117,7 @@
base_ptr = (char*)base_adr[bus]; /* Set the I2C-device the user wants to use */ - dev = pcidev_on_root(I2C1_DEV, bus + 1); + dev = pcidev_on_root(PCH_DEV_SLOT_I2C1, bus + 1);
/* Ensure we have the right PCI device */ if ((pci_read_config16(dev, 0x0) != I2C_PCI_VENDOR_ID) || @@ -174,7 +174,7 @@ int stat;
/* Get base address of desired I2C-controller */ - dev = pcidev_on_root(I2C1_DEV, bus + 1); + dev = pcidev_on_root(PCH_DEV_SLOT_I2C1, bus + 1); base_ptr = (char *)pci_read_config32(dev, PCI_BASE_ADDRESS_0); if (base_ptr == NULL) { printk(BIOS_INFO, "I2C: Invalid Base address\n"); @@ -233,7 +233,7 @@ int stat;
/* Get base address of desired I2C-controller */ - dev = pcidev_on_root(I2C1_DEV, bus + 1); + dev = pcidev_on_root(PCH_DEV_SLOT_I2C1, bus + 1); base_ptr = (char *)pci_read_config32(dev, PCI_BASE_ADDRESS_0); if (base_ptr == NULL) { return I2C_ERR_INVALID_ADR; diff --git a/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h b/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h index 00ff268..5e5b807 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h +++ b/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h @@ -110,6 +110,8 @@ # define SOC_DEVFN_I2C6 PCI_DEVFN(I2C6_DEV,I2C6_FUNC) # define SOC_DEVFN_I2C7 PCI_DEVFN(I2C7_DEV,I2C7_FUNC)
+#define PCH_DEV_SLOT_I2C1 I2C1_DEV + /* Trusted Execution Engine */ #define TXE_DEV 0x1a #define TXE_FUNC 0