Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44049 )
Change subject: soc/intel/xeon_sp/cpx: enable PLATFORM_USES_FSP2_2
......................................................................
Patch Set 1:
(4 comments)
https://review.coreboot.org/c/coreboot/+/44049/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/44049/1//COMMIT_MSG@9
PS1, Line 9: of
remove 'of'
Done
https://review.coreboot.org/c/coreboot/+/44049/1//COMMIT_MSG@13
PS1, Line 13: implmentation
impl*e*mentation
Done
https://review.coreboot.org/c/coreboot/+/44049/1//COMMIT_MSG@17
PS1, Line 17: DCACHE_RAM_SIZE
Put on the next line
Done
https://review.coreboot.org/c/coreboot/+/44049/1/src/soc/intel/xeon_sp/cpx/K...
File src/soc/intel/xeon_sp/cpx/Kconfig:
https://review.coreboot.org/c/coreboot/+/44049/1/src/soc/intel/xeon_sp/cpx/K...
PS1, Line 9: select PLATFORM_USES_FSP2_2
This should be selected from `config SOC_INTEL_COOPERLAKE_SP`
Done
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I25e39083df1ebfe78871561b0a0e230b66524ea9
Gerrit-Change-Number: 44049
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