[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add provision to skip postcar and load ramstage

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34754 )

Change subject: soc/intel/cannonlake: Add provision to skip postcar and load ramstage
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/34754/2/src/soc/intel/cannonlake/ro... 
File src/soc/intel/cannonlake/romstage/romstage.c:

https://review.coreboot.org/c/coreboot/+/34754/2/src/soc/intel/cannonlake/ro... 
PS2, Line 143: 	set_var_mtrr(mtrr, base, size, MTRR_TYPE_WRPROT);
> yes you are right, in fact i have done in that way first but later i saw the code changes was too mu […]

Was this 'first way' available for review? I am explicitly saying to program the MTRRs (even in C) without tearing down the CAR. And then reuse the same frame in ramstage to teardown CAR after stack switch.