Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38783 )
Change subject: cpu/x86/mp_init: Refactor and comment staggered SMBASE calculation ......................................................................
cpu/x86/mp_init: Refactor and comment staggered SMBASE calculation
Change-Id: I98f55938f224ee49361d73e68ace9f9fcee7f48a Signed-off-by: Nico Huber nico.h@gmx.de --- M src/cpu/x86/mp_init.c 1 file changed, 8 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/38783/1
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 45f7337..77eb661 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -720,7 +720,7 @@ const struct smm_runtime *runtime; int cpu; uintptr_t curr_smbase; - uintptr_t perm_smbase; + uintptr_t staggered_smbase;
p = arg; runtime = p->runtime; @@ -737,9 +737,13 @@ * The permanent handler runs with all cpus concurrently. Precalculate * the location of the new SMBASE. If using SMM modules then this * calculation needs to match that of the module loader. + * + * Hardware assumes SMM entry at SMM_ENTRY_OFFSET, memory below this + * offset won't be accessed. `staggered_smbase` can point below actual + * SMRAM, hence. */ - perm_smbase = mp_state.perm_smbase; - perm_smbase -= cpu * runtime->save_state_size; + staggered_smbase = mp_state.perm_smbase; + staggered_smbase -= cpu * runtime->save_state_size;
printk(BIOS_DEBUG, "New SMBASE 0x%08lx\n", perm_smbase);
@@ -747,7 +751,7 @@ mp_state.ops.relocation_handler(cpu, curr_smbase, perm_smbase);
stm_setup(cpu, mp_state.perm_smbase, mp_state.perm_smsize, - perm_smbase, runtime->start32_offset); + staggered_smbase, runtime->start32_offset); }
static void adjust_smm_apic_id_map(struct smm_loader_params *smm_params)