Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41949 )
Change subject: soc/mediatek/mt8183: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 10:
(4 comments)
https://review.coreboot.org/c/coreboot/+/41949/10/src/soc/mediatek/mt8183/in... File src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h:
https://review.coreboot.org/c/coreboot/+/41949/10/src/soc/mediatek/mt8183/in... PS10, Line 37: #define DQS_NUMBER_LP4 DQS_NUMBER : #define DQ_DATA_WIDTH_LP4 DQ_DATA_WIDTH Could we rename DQ_DATA_WIDTH and DQ_DATA_WIDTH directly? So that we don't have to define "aliases" for them.
https://review.coreboot.org/c/coreboot/+/41949/10/src/soc/mediatek/mt8183/in... File src/soc/mediatek/mt8183/include/soc/dramc_param.h:
https://review.coreboot.org/c/coreboot/+/41949/10/src/soc/mediatek/mt8183/in... PS10, Line 67: Please add this blank line back.
PS10:
Do we really need to modify this file? Could we move enum DRAMC_PARAM_GEOMETRY_TYPE to emi. […]
After discussing with Hung-Te. Now I understand what you're trying to do.
https://review.coreboot.org/c/coreboot/+/41949/10/src/soc/mediatek/mt8183/in... PS10, Line 78: cbt_ca_perbit_delay Why add this? Is this used anywhere?