Attention is currently required from: Tim Wawrzynczak, Eric Lai.
Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62722 )
Change subject: mb/google/nissa/var/nivviks: Add GL9750 power sequence
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Patch Set 1:
(1 comment)
File src/mainboard/google/brya/variants/nivviks/gpio.c:
https://review.coreboot.org/c/coreboot/+/62722/comment/3009e0d1_7164110b
PS1, Line 56: PAD_CFG_GPO(GPP_H12, 1, DEEP)
I reference gimble CL. CB:60279 , but it can work in ramstage table as well, WDYT? I can remove it.
If it works in ramstage too, it seems simpler to just do it there. I think the only reason romstage tables were added in brya was to handle the WWAN power sequencing, which actually requires three different stages. If we can make do with only bootblock and ramstage for nissa, I think I'd prefer that.
Kangheui, do you have any thoughts?
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