Marc Jones (marc.jones@se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8592
-gerrit
commit 5aa523edb3238a97788b402848b2c885c388ca33 Author: Furquan Shaikh furquan@google.com Date: Mon Jul 14 11:50:09 2014 -0700
coreboot arm64: Add proper masks for setting SCTLR and SCR regs to 0 at init
Since RES1 and RES0 bits are marked as SBOP(Should-Be-One-or-Preserved) and SBZP(Should-Be-Zero-or-Preserved) respectively, resetting the SCTLR and SCR registers should be done with proper bitmask.
BUG=None BRANCH=None TEST=Compiles successfully and verified that the RES bits are preserved across register writes.
Original-Change-Id: I5094ba7e51e8ea6f7d7612ba4d11b10dcbdb1607 Original-Signed-off-by: Furquan Shaikh furquan@google.com Original-Reviewed-on: https://chromium-review.googlesource.com/207815 Original-Tested-by: Furquan Shaikh furquan@chromium.org Original-Reviewed-by: Aaron Durbin adurbin@chromium.org Original-Commit-Queue: Furquan Shaikh furquan@chromium.org (cherry picked from commit dfb196b4063e4f94d1ba9d5e2d19bae624ed46b3) Signed-off-by: Marc Jones marc.jones@se-eng.com
Change-Id: I033a68b723fea83817aaa6402b86c78abd3e1da9 --- src/arch/arm64/stage_entry.S | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/src/arch/arm64/stage_entry.S b/src/arch/arm64/stage_entry.S index 56eca77..8e57706 100644 --- a/src/arch/arm64/stage_entry.S +++ b/src/arch/arm64/stage_entry.S @@ -21,9 +21,17 @@ #include <arch/asm.h>
ENTRY(arm64_el3_startup) - mov x0, xzr + /* Set all bits in SCTLR_EL3 to 0 except RES1 and RES0 */ + mrs x0, SCTLR_EL3 + ldr x1, .SCTLR_MASK + and x0, x0, x1 msr SCTLR_EL3, x0 - msr SCR_EL3, x0 + /* Set all bits in SCR_EL3 to 0 except RES1 and RES0 */ + mrs x0, SCR_EL3 + ldr x1, .SCR_MASK + and x0, x0, x1 + msr SCR_EL3, x0 + /* Have stack pointer use SP_EL0. */ msr SPSel, #0 isb @@ -39,6 +47,12 @@ ENTRY(arm64_el3_startup) br x1
.align 4 + .SCTLR_MASK: + .quad 0x0FFFFEFF0 + + .SCR_MASK: + .quad 0x0FFFFC070 + .align 4 /* * By default branch to main() and initialize the stack according * to the Kconfig option for cpu0. However, this code can be relocated