[coreboot-gerrit] Change in coreboot[master]: mb/facebook/monolith: Configure COMB to 0x3e8

[Wim Vervoorn (Code Review)]

Wim Vervoorn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39499 )

Change subject: mb/facebook/monolith: Configure COMB to 0x3e8
......................................................................

mb/facebook/monolith: Configure COMB to 0x3e8

The 2nd COM port is configured to the 0x2f8 default. Current software
for this system expects the port at 0x3e8.

Configure COMB to use 0x3e8 instead of 0x2f8.

BUG=N/A
TEST=tested on facebook monolith

Change-Id: Ibb462bad5f0594e0b5c8dea6e02cd42d58d999ab
Signed-off-by: Wim Vervoorn 
---
M src/mainboard/facebook/monolith/Kconfig
M src/mainboard/facebook/monolith/acpi/superio.asl
M src/mainboard/facebook/monolith/com_init.c
M src/mainboard/facebook/monolith/devicetree.cb
4 files changed, 13 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/39499/1

diff --git a/src/mainboard/facebook/monolith/Kconfig b/src/mainboard/facebook/monolith/Kconfig
index b6c9f19..b4b6370 100644
--- a/src/mainboard/facebook/monolith/Kconfig
+++ b/src/mainboard/facebook/monolith/Kconfig
@@ -11,7 +11,6 @@
    select MAINBOARD_HAS_TPM2
    select MAINBOARD_USES_IFD_GBE_REGION
    select INTEL_GMA_HAVE_VBT
-	select SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE
    select VPD

config CBFS_SIZE
diff --git a/src/mainboard/facebook/monolith/acpi/superio.asl b/src/mainboard/facebook/monolith/acpi/superio.asl
index 537d9f8..99e3a53 100644
--- a/src/mainboard/facebook/monolith/acpi/superio.asl
+++ b/src/mainboard/facebook/monolith/acpi/superio.asl
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 2011 Google Inc.
  * Copyright (C) 2015 Intel Corp.
- * Copyright (C) 2018-2019 Eltan B.V.
+ * Copyright (C) 2018-2020 Eltan B.V.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -55,14 +55,14 @@

Name (_CRS, ResourceTemplate ()
    {
-		FixedIO (0x02F8, 0x08)
+		FixedIO (0x03E8, 0x08)
    	IRQNoFlags () {3}
    })

Name (_PRS, ResourceTemplate ()
    {
    	StartDependentFn (0, 0) {
-			FixedIO (0x02F8, 0x08)
+			FixedIO (0x03E8, 0x08)
    		IRQNoFlags () {3}
    	}
    	EndDependentFn ()
diff --git a/src/mainboard/facebook/monolith/com_init.c b/src/mainboard/facebook/monolith/com_init.c
index d2519fa..b0002fc 100644
--- a/src/mainboard/facebook/monolith/com_init.c
+++ b/src/mainboard/facebook/monolith/com_init.c
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 2013 Google Inc.
  * Copyright (C) 2015 Intel Corp.
- * Copyright (C) 2018-2019 Eltan B.V.
+ * Copyright (C) 2018-2020 Eltan B.V.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -17,6 +17,7 @@

#include <bootblock_common.h>
 #include <device/pnp_ops.h>
+#include <device/pnp.h>
 #include "onboard.h"

#define SERIAL_DEV1 PNP_DEV(ITE8528_CMD_PORT, 1) /* ITE8528 UART1 */
@@ -28,5 +29,7 @@
    pnp_set_logical_device(SERIAL_DEV1);
    pnp_set_enable(SERIAL_DEV1, 1);
    pnp_set_logical_device(SERIAL_DEV2);
+	pnp_set_iobase(SERIAL_DEV2, PNP_IDX_IO0, 0x3e8);
+	pnp_set_irq(SERIAL_DEV2, PNP_IDX_IRQ0, 3);
    pnp_set_enable(SERIAL_DEV2, 1);
 }
diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb
index e9fa2a14..e65fe3c 100644
--- a/src/mainboard/facebook/monolith/devicetree.cb
+++ b/src/mainboard/facebook/monolith/devicetree.cb
@@ -12,6 +12,12 @@
    register "gpe0_dw1" = "GPP_D"
    register "gpe0_dw2" = "GPP_E"

+	# Set the fixed lpc ranges
+	# enable COMA at 3f8 and COMB at 3e8 (instead of the default 2f8)
+	# enable the embedded controller
+	register "lpc_iod" = "0x0070"
+	register "lpc_ioe" = "LPC_IOE_COMA_EN | LPC_IOE_COMB_EN | LPC_IOE_EC_62_66"
+
    # CPLD host command ranges are in 0x280-0x2BF
    # EC PNP registers are at 0x6e and 0x6f
    register "gen1_dec" = "0x003c0281"