[coreboot-gerrit] Change in coreboot[master]: sb/intel/lynxpoint: Drop unneeded and rotten Kconfig option

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44547 )

Change subject: sb/intel/lynxpoint: Drop unneeded and rotten Kconfig option
......................................................................

sb/intel/lynxpoint: Drop unneeded and rotten Kconfig option

Not selecting `ME_MBP_CLEAR_LATE` results in a build failure. Since both
traditional and ULT platforms are known to be working, drop the option.

Change-Id: I09ce27f812966800e36f6c0624c93759089faf45
Signed-off-by: Angel Pons 
---
M src/southbridge/intel/lynxpoint/Kconfig
M src/southbridge/intel/lynxpoint/me_9.x.c
2 files changed, 0 insertions(+), 16 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/44547/1

diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig
index 3071fae..c104cbb 100644
--- a/src/southbridge/intel/lynxpoint/Kconfig
+++ b/src/southbridge/intel/lynxpoint/Kconfig
@@ -51,15 +51,6 @@
      If you set this option to y, the serial IRQ machine will be
      operated in continuous mode.

-config ME_MBP_CLEAR_LATE
-	bool "Defer wait for ME MBP Cleared"
-	default y
-	help
-	  If you set this option to y, the Management Engine driver
-	  will defer waiting for the MBP Cleared indicator until the
-	  finalize step.  This can speed up boot time if the ME takes
-	  a long time to indicate this status.
-
 config FINALIZE_USB_ROUTE_XHCI
    bool "Route all ports to XHCI controller in finalize step"
    default y
diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c
index 12168de..f32ee5b 100644
--- a/src/southbridge/intel/lynxpoint/me_9.x.c
+++ b/src/southbridge/intel/lynxpoint/me_9.x.c
@@ -548,10 +548,8 @@
    if (!mei_base_address || mei_base_address == (u32 *)0xfffffff0)
    	return;

-#if CONFIG(ME_MBP_CLEAR_LATE)
    /* Wait for ME MBP Cleared indicator */
    intel_me_mbp_clear(PCH_ME_DEV);
-#endif

/* Make sure ME is in a mode that expects EOP */
    reg32 = pci_read_config32(PCH_ME_DEV, PCI_ME_HFS);
@@ -927,11 +925,6 @@
    host.interrupt_generate = 1;
    write_host_csr(&host);

-#if !CONFIG(ME_MBP_CLEAR_LATE)
-	/* Wait for the mbp_cleared indicator. */
-	intel_me_mbp_clear(dev);
-#endif
-
    /* Dump out the MBP contents. */
    if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) {
    	printk(BIOS_INFO, "ME MBP: Header: items: %d, size dw: %d\n",