Marc Jones (marc.jones@se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8127
-gerrit
commit 0f0e99a8558ac858732c151371c09ecb7120b619 Author: huang lin hl@rock-chips.com Date: Fri Jun 20 11:34:46 2014 +0800
libpayload: Add Rock Chip drivers
Add support: 1)Support driver rktimer 2)Support driver rkserial
BUG=chrome-os-partner:29778 TEST=emerge-veyron libpayload
Original-Change-Id: I2cccedf3b62883dd372842a7972e93f2ebbfb282 Original-Signed-off-by: huang lin hl@rock-chips.com Original-Reviewed-on: https://chromium-review.googlesource.com/206184 Original-Reviewed-by: Julius Werner jwerner@chromium.org Original-Tested-by: Julius Werner jwerner@chromium.org Original-Commit-Queue: Julius Werner jwerner@chromium.org (cherry picked from commit 387450d7c36b201bd177d46eb9f1d280fc043aab) Signed-off-by: Marc Jones marc.jones@se-eng.com
Change-Id: Ia6b7a8ee2439a6f2bf7577df822d3f4f3a1e441c --- payloads/libpayload/Config.in | 12 +++ payloads/libpayload/configs/config.arm64-generic | 1 + payloads/libpayload/configs/defconfig | 5 +- payloads/libpayload/configs/defconfig-arm | 4 +- payloads/libpayload/drivers/Makefile.inc | 3 +- payloads/libpayload/drivers/serial/rk_serial.c | 115 +++++++++++++++++++++++ payloads/libpayload/drivers/timer/rktimer.c | 44 +++++++++ 7 files changed, 180 insertions(+), 4 deletions(-)
diff --git a/payloads/libpayload/Config.in b/payloads/libpayload/Config.in index a0889c8..6c95bfa 100644 --- a/payloads/libpayload/Config.in +++ b/payloads/libpayload/Config.in @@ -199,6 +199,11 @@ config TEGRA_SERIAL_CONSOLE depends on SERIAL_CONSOLE default n
+config RK_SERIAL_CONSOLE + bool "Rockchip SOC serial port driver" + depends on SERIAL_CONSOLE + default n + config IPQ806X_SERIAL_CONSOLE bool "IPQ806x SOC compatible serial port driver" depends on SERIAL_CONSOLE @@ -383,6 +388,8 @@ config TIMER_TEGRA_1US config TIMER_IPQ806X bool "Timer for ipq806x platforms"
+config TIMER_RK + bool "Timer for Rockchip" endchoice
config TIMER_MCT_HZ @@ -395,6 +402,11 @@ config TIMER_MCT_ADDRESS depends on TIMER_MCT default 0x101c0000
+config TIMER_RK_ADDRESS + hex "Rockchip timer base address" + depends on TIMER_RK + default 0xff810020 + config TIMER_TEGRA_1US_ADDRESS hex "Tegra u1s timer base address" depends on TIMER_TEGRA_1US diff --git a/payloads/libpayload/configs/config.arm64-generic b/payloads/libpayload/configs/config.arm64-generic index 97d865b..c2285fe 100644 --- a/payloads/libpayload/configs/config.arm64-generic +++ b/payloads/libpayload/configs/config.arm64-generic @@ -48,6 +48,7 @@ CONFIG_LP_TIMER_NONE=y # CONFIG_LP_TIMER_MCT is not set # CONFIG_LP_TIMER_TEGRA_1US is not set # CONFIG_LP_TIMER_IPQ806X is not set +# CONFIG_LP_TIMER_RK is not set CONFIG_LP_USB=y # CONFIG_LP_USB_OHCI is not set CONFIG_LP_USB_EHCI=y diff --git a/payloads/libpayload/configs/defconfig b/payloads/libpayload/configs/defconfig index 1fbd961..a09a78c 100644 --- a/payloads/libpayload/configs/defconfig +++ b/payloads/libpayload/configs/defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # libpayload version: 0.2.0 -# Wed Dec 31 11:36:31 2014 +# Mon Jan 5 15:27:43 2015 #
# @@ -17,8 +17,8 @@ # Architecture Options # # CONFIG_LP_ARCH_ARM is not set -# CONFIG_LP_ARCH_ARM64 is not set CONFIG_LP_ARCH_X86=y +# CONFIG_LP_ARCH_ARM64 is not set # CONFIG_LP_MEMMAP_RAM_ONLY is not set # CONFIG_LP_MULTIBOOT is not set
@@ -41,6 +41,7 @@ CONFIG_LP_SERIAL_CONSOLE=y CONFIG_LP_8250_SERIAL_CONSOLE=y # CONFIG_LP_S5P_SERIAL_CONSOLE is not set # CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set +# CONFIG_LP_RK_SERIAL_CONSOLE is not set # CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set # CONFIG_LP_PL011_SERIAL_CONSOLE is not set CONFIG_LP_SERIAL_IOBASE=0x3f8 diff --git a/payloads/libpayload/configs/defconfig-arm b/payloads/libpayload/configs/defconfig-arm index 862443d..b765422 100644 --- a/payloads/libpayload/configs/defconfig-arm +++ b/payloads/libpayload/configs/defconfig-arm @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # libpayload version: 0.2.0 -# Mon Jan 5 15:06:15 2015 +# Mon Jan 5 15:28:18 2015 #
# @@ -40,6 +40,7 @@ CONFIG_LP_SERIAL_CONSOLE=y # CONFIG_LP_8250_SERIAL_CONSOLE is not set # CONFIG_LP_S5P_SERIAL_CONSOLE is not set # CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set +# CONFIG_LP_RK_SERIAL_CONSOLE is not set # CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set # CONFIG_LP_SERIAL_SET_SPEED is not set # CONFIG_LP_SERIAL_ACS_FALLBACK is not set @@ -59,6 +60,7 @@ CONFIG_LP_TIMER_NONE=y # CONFIG_LP_TIMER_MCT is not set # CONFIG_LP_TIMER_TEGRA_1US is not set # CONFIG_LP_TIMER_IPQ806X is not set +# CONFIG_LP_TIMER_RK is not set CONFIG_LP_USB=y CONFIG_LP_USB_OHCI=y CONFIG_LP_USB_EHCI=y diff --git a/payloads/libpayload/drivers/Makefile.inc b/payloads/libpayload/drivers/Makefile.inc index 538a8a6..0fc2faa 100644 --- a/payloads/libpayload/drivers/Makefile.inc +++ b/payloads/libpayload/drivers/Makefile.inc @@ -37,7 +37,7 @@ libc-$(CONFIG_LP_8250_SERIAL_CONSOLE) += serial/8250.c libc-$(CONFIG_LP_S5P_SERIAL_CONSOLE) += serial/s5p.c libc-$(CONFIG_LP_TEGRA_SERIAL_CONSOLE) += serial/tegra.c libc-$(CONFIG_LP_IPQ806X_SERIAL_CONSOLE) += serial/ipq806x.c - +libc-$(CONFIG_LP_RK_SERIAL_CONSOLE) += serial/rk_serial.c libc-$(CONFIG_LP_PC_KEYBOARD) += keyboard.c
libc-$(CONFIG_LP_CBMEM_CONSOLE) += cbmem_console.c @@ -50,6 +50,7 @@ libc-$(CONFIG_LP_TIMER_MCT) += timer/mct.c libc-$(CONFIG_LP_TIMER_RDTSC) += timer/rdtsc.c libc-$(CONFIG_LP_TIMER_TEGRA_1US) += timer/tegra_1us.c libc-$(CONFIG_LP_TIMER_IPQ806X) += timer/ipq806x.c +libc-$(CONFIG_LP_TIMER_RK) += timer/rktimer.c
# Video console drivers libc-$(CONFIG_LP_VIDEO_CONSOLE) += video/video.c diff --git a/payloads/libpayload/drivers/serial/rk_serial.c b/payloads/libpayload/drivers/serial/rk_serial.c new file mode 100644 index 0000000..8c3f679 --- /dev/null +++ b/payloads/libpayload/drivers/serial/rk_serial.c @@ -0,0 +1,115 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Rockchip Electronics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include <libpayload-config.h> +#include <libpayload.h> +struct rk_uart { + union { + u32 uart_thr; /*Transmit holding register.*/ + u32 uart_rbr; /*Receive buffer register.*/ + u32 uart_dll; /* Divisor latch lsb.*/ + }; + union { + u32 uart_ier; /*Interrupt enable register.*/ + u32 uart_dlh; /* Divisor latch msb.*/ + }; + union { + uint32_t uart_iir; /*Interrupt identification register.*/ + uint32_t uart_fcr; /* FIFO control register.*/ + }; + u32 uart_lcr; + u32 uart_mcr; + u32 uart_lsr; + u32 uart_msr; + u32 uart_scr; + u32 reserved1[(0x30 - 0x20) / 4]; + u32 uart_srbr[(0x70 - 0x30) / 4]; + u32 uart_far; + u32 uart_tfr; + u32 uart_rfw; + u32 uart_usr; + u32 uart_tfl; + u32 uart_rfl; + u32 uart_srr; + u32 uart_srts; + u32 uart_sbcr; + u32 uart_sdmam; + u32 uart_sfe; + u32 uart_srt; + u32 uart_stet; + u32 uart_htx; + u32 uart_dmasa; + u32 reserver2[(0xf4 - 0xac) / 4]; + u32 uart_cpr; + u32 uart_ucv; + u32 uart_ctr; +}; +enum { + UART_LSR_DR = 0x1 << 0, /*Data ready.*/ + UART_LSR_OE = 0x1 << 1, /*Overrun.*/ + UART_LSR_PE = 0x1 << 2, /*Parity error.*/ + UART_LSR_FE = 0x1 << 3, /*Framing error.*/ + UART_LSR_BI = 0x1 << 4, /*Break.*/ + UART_LSR_THRE = 0x1 << 5, /*Xmit holding register empty.*/ + UART_LSR_TEMT = 0x1 << 6, /*Xmitter empty.*/ + UART_LSR_ERR = 0x1 << 7 /* Error.*/ +}; + +static struct rk_uart *uart_regs; +void serial_putchar(unsigned int c) +{ + while (!(readl(&uart_regs->uart_lsr) & UART_LSR_THRE)); + writel((c&0xff), &uart_regs->uart_thr); + if (c == '\n') + serial_putchar('\r'); +} + +int serial_havechar(void) +{ + uint8_t lsr = readl(&uart_regs->uart_lsr); + return (lsr & UART_LSR_DR) == UART_LSR_DR; +} + +int serial_getchar(void) +{ + while (!serial_havechar()); + return readl(&uart_regs->uart_rbr)&0xff; +} + +static struct console_input_driver consin = { + .havekey = &serial_havechar, + .getchar = &serial_getchar +}; + +static struct console_output_driver consout = {.putchar = &serial_putchar +}; + +void serial_init(void) +{ + if (!lib_sysinfo.serial || !lib_sysinfo.serial->baseaddr) + return; + + uart_regs = (struct rk_uart *)lib_sysinfo.serial->baseaddr; +} + +void serial_console_init(void) +{ + serial_init(); + console_add_input_driver(&consin); + console_add_output_driver(&consout); +} diff --git a/payloads/libpayload/drivers/timer/rktimer.c b/payloads/libpayload/drivers/timer/rktimer.c new file mode 100644 index 0000000..1634b77 --- /dev/null +++ b/payloads/libpayload/drivers/timer/rktimer.c @@ -0,0 +1,44 @@ + +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Rockchip Electronics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include <arch/io.h> +#include <libpayload.h> +#include <stdint.h> +struct rk_timer { + u32 timer_load_count0; + u32 timer_load_count1; + u32 timer_curr_value0; + u32 timer_curr_value1; + u32 timer_ctrl_reg; + u32 timer_int_status; +}; +uint64_t timer_hz(void) +{ + return 24000000; +} +uint64_t timer_raw_value(void) +{ + uint64_t upper; + uint64_t lower; + struct rk_timer *rk_timer; + rk_timer = (struct rk_timer *)CONFIG_LP_TIMER_RK_ADDRESS; + lower = (uint64_t) rk_timer->timer_curr_value0; + upper = (uint64_t) rk_timer->timer_curr_value1; + return (upper << 32) | lower; +}